1.
Identify the operation performed by the
following circuit, where A and B are 4 bit inputs.

2.
Find the modulus of the following asynchronous
counter circuit

3.
Find the output expression for the following
circuit.

4.
Identify the operation performed by given
sequential circuit.

5.
Minimize the following circuit and realize the
circuit using only minimum number of 2 input NAND gates

6.
Find the combinational logic expression realized
by the given MUX.

7.
Find the relation between CLKA and CLK and also
between CLKB and CLK.

8.
Find the output for different values of inputs
as shown for the given JK flip flop.

9.
Determine the resulting serial data that appear
on the output ‘Q’. Assume there is one clock pulse for each bit time, Q is initially
zero and preset and clear inputs are HIGH initially. Rightmost bits are applied
first.

10.
Find the modulus of the following synchronous
counter.

11.
Find the relation between clock frequency and
output frequency at Q.

12.
An AB flip-flop is shown for all possible input
combinations. Write the truth table of the flip-flop.