Wednesday, April 9, 2014

GATE 1999 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. The early effect in a bipolar junction transistor is caused by
a. Fast turn ON
b. Fast turn OFF
c. Large Collector – Base reverse bias
d. Large Emitter – Base forward bias

Answer: C
Solution: www.youtube.com/watch?v=QsIqgVPIAxU


2. In the cascode amplifier shown in figure, if the common emitter stage (Q1) has a Transconductance of gm1 and the common base stage (Q2) has Transconductance of gm2, then the overall Transconductance g = Io / Vi of the cascode amplifier is
a. gm1
b. gm2
c. gm1/2
d. gm2/2

Answer: A
Solution : https://www.youtube.com/watch?v=S4DaucXo7Uo


3. An n-channel JFET has IDSS = 2 mA and Vp = -4 volts. Its Transconductance gm in mS for an
applied gate to source voltage of -2 volts is
a. 0.25
b. 0.50
c. 0.75
d. 1.0

Answer: B
Solution : https://www.youtube.com/watch?v=ANQD8vJtkw8


4. A DC power supply has a no-load voltage of 30 volts, and a full load voltage of 25 volts at a full
load current of one amp. Its output resistance and load regulation, respectively are
a. 5 Ω and 20 %
b. 25 Ω and 20 %
c. 5 Ω and 16.7 %
d. 25 Ω and 16.7 %

Answer: B
Solution : https://www.youtube.com/watch?v=cgv8J_E_FqY


5. In the CMOS inverter circuit shown in figure, the input Vi makes a transition from VOL (= 0 volts) to VOH (= 5 volts). Determine the High to Low propagation delay time (tpHL) when it is driving a capacitive load (CL) of 20 pF.
Device data :

Answer: 0.156 µSec
Solution : https://www.youtube.com/watch?v=0t8YIeh7E_0

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